Differential amplifier circuit

ABSTRACT

A differential amplifier circuit which comprises an emitter follower transistor adapted to operate at the same time the power supply is turned on, the output of said transistor being fed to the first input of the differential amplifier and servicing to charge a capacitor connected to the second input of said differential amplifier, whereby the rise of the output signal is made quick and the so-called pop signal normally produced in the amplifier is eliminated.

United States Patent Sakamoto Dec. 25, 1973 DIFFERENTIAL AMPLIFIERCIRCUIT Primar ExaminerR0 Lake 75lt:YhSktTk,J' Y Y 1 nven or as m a amo0 yo apdn Assistant ExaminerLawrence .I. Dahl [73] Assignee: Hitachi,Ltd., Tokyo, Japan Armme Paul M. Craig, Jr. et al. [22] Filed: Sept. 27,I972 211 Appl. No.: 292,785 [57] ABSTRACT A differential amplifiercircuit which comprises an emitter follower transistor adapted tooperate at the [52] US. Cl. 330/30 D, 330/22, 33330oll266g, Same timethe power pp y is turned the output of [51] Int Cl H03 3/68 saidtransistor being fed to the first input of the differ- [58] Fieid 22 30D ential amplifier and servicing to charge a capacitor "33O/40 connectedto the second input of said differential amplifier, whereby the rise ofthe output signal is made [56] References Cited quick and the so-calledpop signal normally produced in the amplifier is eliminated.

4 Claims, 4 Drawing Figures SHEET 10F 2 PATENTED'UEC 2 5 ISIS FIG;-

OUT

FIG. 2

TIME T (sec DIFFERENTIAL AMPLIFIER CIRCUIT The present invention relatesto a differential amplifier circuit, and more particularly to adifferential amplifier circuit in which the rise time of an outputsignal is shortened upon closure of the power supply so as to eliminatethe initial noise, known as a pop signal'or pop tone which results froman abrupt rise of the output signal upon initial energization of thecircuit.

As will be described in detail hereinafter, prior art differentialamplifier circuits are generally disadvantageous as a result of noisegenerated therein due to the rise characteristics of the output signalthereof.

An object of the present invention is to provide a 'differentialamplifier circuit in which the output signal has a rise time whichavoids generation of troublesome noise of type inherently provided bythe known arrangements.

Another object of the present invention is to provide a differentialamplifier circuit which is free from sudden rise of the output signalupon connection of the amplifier to the power supply.

The invention will be fully understood from the following detaileddescription taken in conjunction with the accompanying drawings, inwhich:

FIG. 1 is a schematic circuit diagram showing a prior art differentialcircuit;

FIG. 2 is a diagram showing the waveforms of the signals at variousparts of the differential amplifier circuit illustrated in FIG. '1;

FIG. 3 is a schematic circuit diagram showing an embodiment of adifferential amplifier circuit according to the present invention; and

FIG. 4 shows the waveforms of the signals at various parts of thedifferential amplifier circuit illustrated in FIG. 3.

Referring to FIG. 1, which shows aprior art differential amplifiercircuit, T, and T designated the first and second transistors for thedifferential operation which have substantially equal characteristics. Athird trans'istor T serves as a constant current source for the firstand second transistors. A load resistor R, is connected between thecollector electrode of the first transistor T and .a power supplyterminal V The first to third transistors T, to T and the resistor R,constitute a differential amplifier. Diodes D,, D and resistors R Rconstitute a series circuit, which is connected between the power supplyterminal V and ground.

A resistor R is connected between the base electrode of the firsttransistor T, and the intersection point of the resistors R and R andserves to supply a bias current to the first transistor T,. A capacitorC,, provided for absorbing ripples, is connected between the connectionpoint of the resistors R and R and ground. The fourth transitor T, hasits base electrode connected to the collector electrode of the firsttransistor T,, while the fifth transistor T, has its base electrodeconnected to the collector electrode of the fourth transistor T Thefourth and fifth transistors T and T are connected in the well-knownDarlington configuration, and effect an operation equivalent to that ofa single P-N-P transistor. A sixth transistor T serves as the load ofthe Darlington transistor T,. A resistor R is connected between theemitter electrode of the sixth transistor T and ground in order to setthe operation point of the sixth transistor T at an appropriate value.The fourth to sixth transistors T to T and the resistor R constitute aninverter.

A feedback element R is connected between the base electrode of thesecond transistor T and the emitter electrode of the fifth transistor Tin order to feed a bias current to the second transistor T and to applynegative feedback to the circuit. A capacitor C is employed for thepurpose of cutting or blocking direct current. A resistor R is connectedbetween the base electrode of the second transistor T and ground throughthe capacitor C The resistors R and R and the capacitor C constitute afeedback path. IN indicates an input terminal which is connected to thebase electrode of the first transistor T, through a capacitor C,,, whileOUT" represents an output terminal which is connected to the emitterelectrode of the fifth transistor T When the circuit arrangement isoperated, a signal source (not shown) is connected between the inputterminal IN and ground. Usually, this signal source has a low impedance.

Changes in voltage and current at various circuit parts, in the circuitarrangement thus described, before a normal operation state is reachedafter the supply voltage V is turned on, are as stated below.

Upon the closure of the power supply V electric potentials at variouspoints of the circuit consisting of the diodes D D theresistors R R Rand the capacitors C,, C, are first changed. The first transistor T,does not cause any collector current to flow before its base voltagebecomes larger than its threshold voltage between the base and ground.Accordingly, the Darlington circuit T T having the terminal voltage ofthe resistor R, and its input bias receives no bias voltage at its baseon theinput side for some time after the closure of the power supply.The potential of the collector side of the circuit, i.e., the potentialof the output terminal OUT istherefore zero. The base potential of thesecond transistor T is also zero.

The capacitors C, and C are charged, so that the base potential of thefirst transistor T, eventually exceeds the threshold voltage. Then, acollector current starts flowing through the transistor T,. The base po-'tential of the second transistor T is still zero at this time, so thatall the current of the differential amplifier circuit flows through thefirst transistor T,. That is to say, the collector current of the firsttransistor T, is nearly twice as large as in the normal operation of theamplifier. For this reason, the input side base of the Darlingtoncircuit T.,, T is strongly biased, to cause an abrupt rise in thepotential of the output terminal OUT to a value approximately equal tothe supply voltage V The capacitor C of the base circuit of the secondtransistor T has started charging through the resistors R and Rsimultaneously with the generation of the voltage of the output terminalOUT.

With the charging of the capicitor C the base potential of the secondtransistor T rises. When the potential approaches the base potential ofthe first transitor T,, the second transistor T is rendered conductive.If R, is approximately twice as large as R in resistance, the collectorcurrent of the second transistor T is finally made nearly equal to thatof the first transistor T,. In the course of further operation in whichthe values of the collector currents of the transistors T,f and T becomeequal, the bias voltage for the input side base of the Darlingtoncircuit T,, T approaches gradually the normal or steady state value.Thus, the potential of the output terminal OUT is finally made equal tothe value of a half of the supply voltage V FIG. 2 illustrates thetransient voltage changes of the respective parts of the circuitarrangement. A curve a depicts the base potendial of the firsttransistor T curves h and b depict the potential of the outpout terminalOUT, and a curve depicts the base potential of the second transistor T,.

As illustrated in FIG. 2, amplification of a signal applied to the inputterminal IN is not carried out in the above amplifier circuit within atime before the potential of the output terminal OUT begins to fall. Afurther period of time is required for the circuit to thereafter reachsteady state operation. Moreover, such operation represents generationof a kind of pulse signal once the voltage of the output terminal OUT israised to the supply voltage V This results in generation of a noise, orthe so-called pop signal or pop tone, when the amplifier is used invoice frequency systems.

In the case where the amplifier deals with a low frequency, the timeconstant between the resistor R and the capacitor C constituting part ofthe feedback path in the circuit arrangement in FIG. 1 needs a certainlower-limit value in order to obtain a voltage gain as well as frequencycharacteristics as predetermined. It is therefore impossible to make t,shorter by reducing the time constant, namely, by quickening the rise ofthe curve 0 in FIG. 2. Is is accordingly unsuitable to try to enhancethe rise characteristic at the output terminal OUT by shortening thetime constant between C and A differential amplifier circuit accordingto the present invention will be described in detail hereunder withreference to FIGS. 3 and 4.

FIG. 3 shows an embodiment of the differential amplifier circuitaccording to the present invention, and it employs the same referencecharacters for the same parts as illustrated in FIG. 1.

Referring to FIG. 3, T, designates a seventh transistor whose inputterminal is at the connection point between the resistors R and R andwhose output terminal is at it's emitter. A resistor R is connectedbetween the connection point of the resistor R, and the capacitor C andthe emitter electrode of the seventh transistor T,. Differences in theembodiment of the invention from the prior art circuit arrangement inFIG. I reside in that the output of the seventh transistor T,, whichoperates simultaneously with closure of the power supply, is supplied asthe base bias of the first transistor T,, and that the capacitor C whichconstitutes the direct current blocking element of the feedback path, ischarged by the output of the seventh transistor T,.

The operation of the circuit arrangement thus constructed will now beexplained in detail.

First, the supply voltage V is fed from the power supply (not shown).Then, the seventh transistor T, is brought into the operative state by acurrent which flows through the series circuit consisting of theresistors R and R and the diode D The output of the seventh transistorT, is supplied through the resistor R. to the capacitor C As shown by acurve a in FIG. 4, base potential of the first transistor T accordinglyrises in conformity with a time constant determined by the values of theresistor R and the capacitor C and becomes stable at nearly 'AV On theother hand, when the seventh transistor T, is operated, the outputthereof charges the capacitor C, through the resistor R The basepotential of the second transistor T is accordingly raised as shown bycurve c in FIG. 4. The direct current blocking capacitor C, of thefeedback path has started charging simutaneously with the closure of thepower supply V The charging speed for the capacitor C is determined bythe product between the resistance of the resistor R and the capacity ofthe capacitor C Abrupt rise of the base potential of the secondtransistor T being one of the transistors for the differential operationis contrived in the circuit arrangement in FIG. 3. The period of timefrom the closure of the power supply to the initiation of the normaloperation of the circuit can therefore be remarkably shortened.

Under a state during which the input terminal IN is connected to asignal source (not shown), the changing speed for the capacitor C, afterthe closure of the power supply is determined by the product between theresistance of the resistor R and the capacity of the capacitor C Herein,the time constants are selected such that R -C z R -C but that R -C R -CThen, the transistor T is first operated. The base potential of thetransistor T exhibits ascending characteristics whose steady voltage isobtained by subtraction of a voltage from the emitter potential of thetransistor T,, the lastmentioned voltage being obtained by multiplyingthe sum resistance of the resistors R and R, by the sum of the basecurrent of the transistor T, and a current flowing through the resistorR to ground. On the other hand, the base potential of the transistor T,exhibits ascending characteristics whose steady voltage is equal to theemitter potential of the transistor T,. For this reason, even if R C, R.C the base potential of the transistor T catches up with that of thetransistor T after lapse of a fixed period of time, and the potential ofthe output terminal OUT starts rising at that time. That is, in thecircuit in FIG. 3, the output terminal OUT has its potential initiatedto rise after the time t as illutstrated by curve b in FIG. 4. Theamplifier begins amplification after the time t In FIG. 4, the distanceE between a broken line and the middle point potential (V /2 level)indicates the value of a voltage drop across the resistor R Since therising speeds of the base potentials of the first and second transistorsT and T effecting the differential operation are substantiallydetermined by the time constants C -R and C -R the'i'ise of thecollector current of the second transistor T becomes quick if C -R ismade smaller than C 'R to some extent. Accordingly, no maximum pointoccurs in the potential change at the output terminal OUT at the closureof the power supply V With the connection in FIG. 3, the potential ofthe output terminal OUT is somewhat shifted from the case of FIG. 1. Theproblem of the shift can be solved by adjusting the circuit of R R and Din such way that a diode is incorporated between R, and D In theembodiment, the seventh transistor T, operates as an emitter follower.When the capacitors C and C are charged after the closure of the powersupply V the output impedance on the emitter side is sufficiently lowowing to the large emitter current of the emitter follower. Accordingly,the voltage of the connection point between the resistors R and R is, inequivalence, connected through the almost negligible impedance to theconnection point between the resistors R and R simultaneously with theclosure of the power supply V This means that rapid charging of thecapacitors C,, C and C is realized.

In contrast, when the circuit is in the normal operation, the currentflowing through the emitter of the seventh transistor T is only slightlydifferent from the base current to the differentially operatedtransistors T, and T and is extremely small. Such decrease in theemitter current of the seventh transistor T signifies that the emitteroutput impedance of the transistor in the normal operation state of thecircuit arrangement rises. This results in the face that the decouplingoperation with the other circuit parts as well as the ripple removingoperation by the capacitor C, can be made satisfactory. For this reason,the capacitor C, is not connected to the connection point between theresistors R and R in the case of the embodiment, but it is connected tothe emitter of the seventh transistor T As has been described above inaccordance with the differential amplifier circuit of the presentinvention, a transistor for charging the capacitors is employed, so thatthe rise of the output potential as closure of power supply becomes muchfaster than in the prior art.

In addition, in accordance with the present invention, the rise of anoutput signal at the closure of the power supply is gradual, so that thenoise (pop signal) previously generated upon the closure of the powersupply in the prior art can be eliminated. Such various excellentresults are attained. While the transistors in the embodiment of theinvention are bipolar transistors, similar results are obtained byadopting field efiect transistors.

What is claimed is:

l. A differential amplifier circuit comprising a differential amplifierhaving first and second inputs and an output, a first capacitorconnected between said first input and an input terminal, a feedbackpath including a second capacitor connected between said second inputand one terminal of a power supply, a feedback element connected betweensaid differential amplifier output and said second input thereof forfeeding-back an output of said differential amplifier to said secondinput, voltage divider means including an emitter follower transistorfor dividing the voltage across terminals of said power supply andproviding a voltage to be applied to said first input, a first resistorconnected between an emitter of said emitter follower transistor andsaid first input, and a second resistor connected between said emitterof said emitter follower transistor and said second capacitor.

2. A differential amplifier circuit according to claim 1 wherein R, isthe resistance of said first resistor, R is the resistance of saidsecond resistor, C, is the capacity of said first capacitor and C is thecapacity of the second capacitor, the elements having the relation C,-R,a C 'R 3. A differential amplifier circuit according to claim 1 whereina capacitor serving as a ripple filter is connected between said emitterof said emitter follower transistor and said one terminal of said powersupply.

4. A differential amplifier circuit according to claim 3, wherein R, isthe resistance of said first resistor, R is the resistance of saidsecond resistor, C is the capacity of said first capacitor and C is thecapacity of said second capacitor, the elements having the relationC,'R, a C -R

1. A differential amplifier circuit comprising a differential amplifierhaving first and second inputs and an output, a first capacitorconnected between said first input and an input terminal, a feedbackpath including a second capacitor connected between said second inputand one terminal of a power supply, a feedback element connected betweensaid differential amplifier output and said second input thereof forfeeding-back an output of said differential amplifier to said secondinput, voltage divider means including an emitter follower transistorfor dividing the voltage across terminals of said power supply andproviding a voltage to be applied to said first input, a first resistorconnected between an emitter of said emitter follower transistor andsaid first input, and a second resistor connected between said emitterof said emitter follower transistor and said second capacitor.
 2. Adifferential amplifier circuit according to claim 1 wherein R1 is theresistance of said first resistor, R2 is the resistance of said secondresistor, C1 is the capacity of said first capacitor and C2 is thecapacity of the second capacitor, the elements having the relationC1.R1 > or = C2.R2.
 3. A differential amplifier circuit according toclaim 1 wherein a capacitor serving as a ripple filter is connectedbetween said emitter of said emitter follower transistor and said oneterminal of said power supply.
 4. A differential amplifier circuitaccording to claim 3, wherein R1 is the resistance of said firstresistor, R2 is the resistance of said second resistor, C1 is thecapacity of said first capacitor and C2 is the capacity of said secondcapacitor, the elements having the relation C1.R1 > or = C2.R2.